1. Field of the Invention
The present invention relates to a semiconductor memory device having a substrate voltage production circuit which includes a time delay circuit for removing substrate current I.sub.SUB during both precharge cycle time and active cycle time of a clock period.
2. Background Information
Generally, a substrate current I.sub.SUB is generated during normal operation of a semiconductor memory device.
If the substrate current I.sub.SUB is not effectively removed by a substrate voltage production circuit, the semiconductor memory device is likely to latch up under normal operating conditions and an erroneous operation may occur.
Accordingly, removing of the substrate current I.sub.SUB is a main focus in semiconductor memory design where stable operation and fast speed is critical.
In the past, in connection with DRAM technology, a substrate current I.sub.SUB exists at two select specified time orders.
As shown in FIG. 3, a substrate current of a first time order is generated when a sense amplifier (S/A) 3 develops data to be stored in memory cell MC comprising transistor M.phi. and capacitor C1 (active cycle).
After an external chip selection signal is disabled (precharge cycle) and an equalizing signal .phi. EQ on bit lines B/L, B/L is enabled, transistors M.sub.1, M.sub.2 and M.sub.3 equalize bit lines B/L, B/L completely. As much as 1/2 Vcc (Vcc is an operating power source voltage) develops across the bit lines to generate a substrate current at a second time order. The substrate voltage production circuit for removing unwanted substrate current I.sub.SUB is in stand-by mode when a capacitance of supply source voltage is small (i.e., precharge cycle) and in active mode when the capacitance of supply source voltage is large (i.e., active cycle).
Conventionally, the stand-by mode is always operational, however, the active mode of the substrate voltage production circuit is operational only during the active cycle of semiconductor memory access.
Hence, because the cycle generating the substrate current of a first time order is the active cycle of memory operation, both substrate voltage production circuit stand-by mode and active mode are operational.
Thus, the unwanted substrate current I.sub.SUB is effectively removed by the substrate voltage production circuit.
However, during the precharge cycle when the substrate current I.sub.SUB is also known to be increasingly generated the substrate voltage production circuit is not-operational with respect to the active mode.
As discussed above, unremoved substrate current during the precharge cycle can lead to the problem of latch up and erroneous memory operation.